Acquisition Performance of a Digital Phase Locked Loop with a Four-Quadrant Arctan Phase Detector

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dc.contributor.author Sithamparanathan, Kandeepan en_US
dc.contributor.author Reisenfeld, Sam en_US
dc.contributor.editor NA en_US
dc.date.accessioned 2009-11-09T05:37:56Z
dc.date.available 2009-11-09T05:37:56Z
dc.date.issued 2004 en_US
dc.identifier 2004002034 en_US
dc.identifier.citation Sithamparanathan Kandeepan and Reisenfeld Sam 2004, 'Acquisition Performance of a Digital Phase Locked Loop with a Four-Quadrant Arctan Phase Detector', ISPACS Committee, Seoul, Korea, pp. 1-5. en_US
dc.identifier.issn 0-7803-8640-X en_US
dc.identifier.other E1 en_US
dc.identifier.uri http://hdl.handle.net/10453/3028
dc.description.abstract The acquisition performance of a digital phase locked loop (DPLL) with a four-quadrant arctan based phase detector (PD) is discussed. In the noiseless case, unlike the traditional sine function based phase locked loops, the acquisition process of the four-quadrant arctan based phase locked loops is less tedious. We look into the pull-in process together with a time-series analysis of the DPLL for the noiseless case. The phase-plane portrait of the loop is also discussed, for both the noiseless and the noisy conditions. en_US
dc.publisher ISPACS Committee en_US
dc.relation.isbasedon http://dx.doi.org/10.1109/ISPACS.2004.1439139 en_US
dc.title Acquisition Performance of a Digital Phase Locked Loop with a Four-Quadrant Arctan Phase Detector en_US
dc.parent ISPACS 2004 Proceedings en_US
dc.journal.volume en_US
dc.journal.number en_US
dc.publocation Seoul, Korea en_US
dc.identifier.startpage 1 en_US
dc.identifier.endpage 5 en_US
dc.cauo.name FEIT.School of Elec, Mech and Mechatronic Systems en_US
dc.conference Verified OK en_US
dc.conference.location Seoul, Korea en_US
dc.for 090600 en_US
dc.personcode 98119439 en_US
dc.personcode 880567 en_US
dc.percentage 100 en_US
dc.classification.name Electrical and Electronic Engineering en_US
dc.classification.type FOR-08 en_US
dc.custom International Symposium on Intelligent Signal Processing and Communications Systems en_US
dc.date.activity 20041118 en_US
dc.location.activity Seoul, Korea en_US
dc.description.keywords digital phase locked loops phase detectors phase noise en_US
dc.staffid 880567 en_US


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