DSP Based Symbol Timing Estimation Techniques

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dc.contributor.author Sithamparanathan, Kandeepan en_US
dc.contributor.author Reisenfeld, Sam en_US
dc.contributor.editor Abeysekera, S; Tian, Q. en_US
dc.date.accessioned 2009-11-09T05:36:49Z
dc.date.available 2009-11-09T05:36:49Z
dc.date.issued 2003 en_US
dc.identifier 2003000621 en_US
dc.identifier.citation Sithamparanathan Kandeepan and Reisenfeld Sam 2003, 'DSP Based Symbol Timing Estimation Techniques', IEEE, Singapore, pp. 568-572. en_US
dc.identifier.issn 0-7803-8186-6 en_US
dc.identifier.other E1 en_US
dc.identifier.uri http://hdl.handle.net/10453/2832
dc.description.abstract This paper presents three symbol timing estimation techniques, using DSP (digital signal processing) methods. The techniques are easily implemented on digital signal processors or FPGAs (field programmable gate arrays). Two feedforward techniques and one feedback technique are presented. The relative performances of the techniques are compared, and the advantages and the disadvantages of the techniques are discussed as well. en_US
dc.publisher IEEE en_US
dc.relation.isbasedon http://dx.doi.org/10.1109/ICICS.2003.1292517 en_US
dc.title DSP Based Symbol Timing Estimation Techniques en_US
dc.parent Proceedings of the 2003 Joint Conference of the 4th International Conference on Information, Communications and Signal Processing and 4th Pacific-Rim Conference on Multimedia en_US
dc.journal.volume en_US
dc.journal.number en_US
dc.publocation Singapore en_US
dc.identifier.startpage 568 en_US
dc.identifier.endpage 572 en_US
dc.cauo.name FEIT.School of Computing and Communications en_US
dc.conference Verified OK en_US
dc.conference.location Singapore en_US
dc.for 080600 en_US
dc.personcode 98119439 en_US
dc.personcode 880567 en_US
dc.percentage 100 en_US
dc.classification.name Information Systems en_US
dc.classification.type FOR-08 en_US
dc.custom International Conference on Information, Communications and Signal Processing en_US
dc.date.activity 20031215 en_US
dc.location.activity Singapore en_US
dc.description.keywords digital signal processing chips , feedback , feedforward , field programmable gate arrays , maximum likelihood estimation , synchronisation en_US
dc.staffid 880567 en_US

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